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Senior Research Engineer (Heterogeneous Integration - Wafer Level Packaging/ Fan-out Wafer Level Packaging), IME


A*STAR RESEARCH ENTITIES
4 days ago
Posted date
4 days ago
N/A
Minimum level
N/A
Job Description:

Research Engineer will be part of heterogeneous integration group focused on development of the advanced packaging technology platforms for multi-chip and high-density FOWLP. He/she will work on the following tasks:
  • Process development for multi-chip and high density FOWLP for various applications such as Chiplets packaging for high power computing, Co-package Optics, Power devices etc.
  • Plan and perform DOEs for various process development and materials evaluation for FOWLP
  • Establish integration flows for advanced packages
  • Coordinate and support engineering build of new packages and development
  • Work with industry partners and multidisciplinary team members to execute assigned tasks and resolve issues for projects
  • Publish new findings and technological advancement in prestigious journals and overseas/local conferences.

Job Requirements
  • University degree or Masters in Electronics / Microelectronics / Material Engineering / Material Science / Chemistry / Physics.
  • Prior experience in developing wafer level packaging and fan-out wafer level packaging
  • Knowledge of advanced packaging technologies such as photolithography, ECP, PVD, plasma and wet etching is preferred
  • Good analytical, communication and presentation skills
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JOB SUMMARY
Senior Research Engineer (Heterogeneous Integration - Wafer Level Packaging/ Fan-out Wafer Level Packaging), IME
A*STAR RESEARCH ENTITIES
Singapore
4 days ago
N/A
Contract / Freelance / Self-employed

Senior Research Engineer (Heterogeneous Integration - Wafer Level Packaging/ Fan-out Wafer Level Packaging), IME