Senior Engineer - Thermo-Mechanical Simulation (Semiconductor Packaging)

Location: Admiralty
Working Days: 5 Day A Week
Working hours : 9:00am - 6:00pm
Salary : $4000 - $8000 (depends experience)

Overview

We are seeking an engineer to join our advanced semiconductor packaging team. The candidate should specialize in thermo-mechanical simulation and analysis for advanced package architectures, with a focus on warpage prediction of large packages and thermal behaviour during Thermocompression (TC) bonding. This role will involve close collaboration with cross-functional teams in package design, process engineering, and reliability to ensure robust thermal and mechanical performance across next-generation semiconductor products.

Key Responsibilities

Thermo-Mechanical Simulation & Modelling

• Develop and execute detailed finite element (FEA) models to predict package warpage during assembly, reflow, and operation.
• Perform thermo-mechanical stress and strain analysis to assess package integrity, focusing on large and heterogeneous packages (e.g., 2.5D/3D IC, chiplets, and large interposers).
• Model and analyze thermal flow and heat distribution within the package during Thermocompression bonding and other thermal processes.

Thermal Flow & Process Interaction

• Simulate and optimize thermal transfer efficiency during bonding to minimize die stress and void formation.
• Evaluate and recommend process parameters for improved bond uniformity and reliability.
• Work with process and materials engineers to correlate simulation results with empirical bonding performance.

Cross-Functional Collaboration

• Collaborate with package design, materials, and process development teams to identify design improvements.
• Support failure analysis activities through root-cause investigation based on thermal and mechanical simulation.
• Provide simulation insights to guide material selection (underfill, die attach, interposer, substrate, etc.).

Reporting & Documentation

• Prepare detailed technical reports, simulation summaries, and presentations.
• Document modelling assumptions, boundary conditions, and validation processes.

Requirements

• M.S. or Ph.D. in Mechanical Engineering, Materials Science, or a related discipline.
• 5+ years of hands-on experience in thermo-mechanical simulation for semiconductor packaging or advanced electronics.
• Proficiency with finite element tools such as ANSYS, Abaqus, COMSOL, or equivalent.
• Strong understanding of package-level thermal and mechanical behaviour, including CTE mismatch, warpage mechanics, and thermal cycling effects.
• Experience with Thermocompression bonding processes, thermal interface materials (TIMs), and underfill dynamics.
• Knowledge of wafer-level packaging (WLP), fan-out, or heterogeneous integration.
• Experience in DOE (Design of Experiments) and statistical correlation between modelling and experimental data.
• Familiarity with material property characterization (CTE, modulus, Tg, etc.) relevant to packaging simulation.

WhatsApp: https://wa.me/6591044149 (Shermaine)

Siah Sze Ming Reg No: R24125414

The Supreme HR Advisory Pte Ltd EA No: 14C7279