You'll receive a schematic from an Analog IC Designer. You will then take that schematic and use a CAD tool to graphically design the layers of that schematic. Then, you run simulations and verifications on the design using Cadence Virtuoso, refine and debug as needed in concert with the designer, and both of you keep iterating the design until it meets the desired specifications.

Each project can last from a couple months to a year and a half. You will likely work on just one project in that time, but may be asked to switch to something else if priorities change. Your flexibility is appreciated.

You'll meet every few days with the designer you're paired with to share information and work together. No circuits get built or tested here without you both, so your partnership and teamwork is extremely valuable to Marvell. You'll also have routine meetings with your technical mentor when you have questions, as well as the layout team and the project team where you may have to speak to the entire group and update them about your progress. You may have to present a particular issue or solution you've encountered. We are developing brand new cutting-edge

Requirement

• Have fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering (graduate or undergraduate).
• Have some specialized course work in analog design or layout, either as part of your Electrical Engineering degree, summer courses, or conference courses.
• Know how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.
• Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell. Fluency in English is required.