Sr Eng Design Enablement

GLOBALFOUNDRIES Singapore Pte. Ltd. | Date Posted: 1-Feb-2019
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Job Nature:
Permanent, Contract
Position Level:
Entry Level
Qualification:
Diploma, Bachelor's / Honours, Masters / PhD

Job Description

The candidate for this position will be responsible for the DFM kit development such as Pattern-Based, Rule-based and Model-based (preferably with Standard Verification Rule Format (SVRF) or TVF (TCL Verification Format), quality deck assurance.

  • Develop and support advanced IC design flow and DFM deck development for Foundry customers in pre-tapeout,  prototype and final design phases to enhance manufacturability
  • Work with internal process owners and major EDA partners (Synopsys, Cadence, Mentor) to realize process aware IC design platform
  • Develop infrastructure for DFM teams by means of web-based and database driven.
  • Build QA checks system and provide automation procedures to ensure high quality DFM Design Kits for customer and IP vendors usage.


Qualifications:

  • PhD / Masters / Degree in Engineering, Microelectronics, Computer Engineering or equivalent
  • At least 7 years of working experience in CAD / EDA / IC physical design or analog circuit implementation
  • Experienced in PDK and rule deck development (LVS / DRC / DFM / PERC / Layout profiling deck development) using Mentor SVRF / TVF or equivalent.
  • Experienced in DFM, silicon process, device and library, process modeling, silicon failure analysis, model – silicon correlation or characterization is a significant plus.
  • Possess knowledge on analog circuit design, circuit simulation, mixed-signals integration.
  • Demonstrated programming skills in the following for work automation:
  • Cadence SKILL programming
  • Scripting languages: Tcl/TK or Perl or Python or Ruby
  • Database scripting (mySQL, Oracle or similar)
  • Makefile mechanism