IC Design Verification Intern

Student will have the opportunities to participate into various projects as part of product development .The position is an exciting opportunity to be part of a flexible and dynamic team working in the growing markets of connectivity, multimedia and consumer electronics. The role is within the Design verification team.

Job Descriptions:

• Learn the architecture and microarchitecture by studying design specifications and direct interact with system architect and designers of various digital blocks.
• Develop verification test plans, ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards
• Enhance test benches and function tests to achieve coverage goals
• Create and support test environments for different design hierarchy levels
• Support Unit level and full-chip level simulation debug

Job Requirements:

• Electrical Engineering or Computer Engineering or Computer Science student
• Basic knowledge of Digital logic design and computer system architecture
• Basic Knowledge and understanding of Verilog RTL
• Knowledge of object oriented programming  C++
• Scripting language knowledge Perl/Python
• Basic knowledge of UVM and System Verilog is a plus
• Singaporeans are welcome to apply