ASIC Design Lead
- Seeking a talented ASIC Design Lead to join a newly set-up SoC team in Singapore. The building blocks in the SoCs to be developed include DSP functions, CPU subsystems, and packet processing engines.
- Responsible for the architecture, design, integration, and verification of wireless communications SoCs.
- Assist with the development of company documentation and generation of patents.
- Involved in recruitment of talents to grow the team.
- Mentor and develop the team to meet company’s strategic goals.
- Master’s degree in Electrical Engineering (or equivalent) with 8+ years’ industry experience.
- Hands-on experience in RTL and verification, in-depth knowledge of mixed-signal SoC development cycle and best industry practices, from specification through tape-out and validation.
- In-depth knowledge of SoC, embedded CPU and bus architectures, networking and control interfaces.
- Proficiency in Verilog for RTL design and verification.
- Confident user of C language and at least one scripting language (Python, tcl, Perl).
The above information on this description has been designed to indicate the general nature, and level, of the work performed by this position. It is not designed to contain, or be interpreted, as a comprehensive inventory of all duties, responsibilities and qualifications required.
Interested candidates may also apply or write in to CS Chua, EA 12C6130/ R1548619 [Click Here to Email Your Resume]. Shortlisted candidates will be contacted for a discussion.
HPS Partners Pte Ltd